ECSN 4.924
Mailstop: EC33

Mehrdad Nourani

Associate Provost, UTD

Education

PhD in Computer Engineering, Case Western Reserve University, Cleveland, Ohio, USA, 1993
M.S in Electrical Engineering, University of Tehran, Tehran, Iran, 1986
B.S in Electrical Engineering, University of Tehran, Tehran, Iran, 1984

Overview

Dr. Mehrdad Nourani has been on the faculty of the University of Texas at Dallas since 1999 where he is currently a Professor of Electrical and Computer Engineering. Dr. Nourani and his students are mainly engaged in research areas related to healthcare technology, VLSI testing and embedded systems. Specifically, his team has developed circuits/systems, biometric signal/image sensing/processing, machine learning algorithms and data analytics for various healthcare including artifact removal in wearable devices, personalized data analytics for pressure ulcers (bedsore) prevention, epileptic seizures alert and monitoring diabetic neuropathy, sleep apnea and hydrocephalus. In area of VLSI testing, his team has focused on testing signal integrity and process variation in nanometer VLSI, aging of MOS transistors and design for reliability. Dr. Nourani’s research has been supported by National Science Foundation (NSF), Semiconductor Research Corporation (SRC), Texas Instruments, Cisco Systems, Texas Medical Research Collaborative (TxMRC), UT Southwestern Medical Center and Clark Foundation. Dr. Nourani is a co-founder of the Quality of Life Technology (QoLT) Laboratories and Center for Integrated Circuits and Systems (CICS) at UT Dallas for collaborative research in broad areas of healthcare technologies and microelectronics.

Research Interests

Healthcare technology and bioinformatics, wearable devices, biometric signal/image processing, machine learning techniques for biomedical data analytics, feature extraction, data-driven risk assessment and prediction.

 

VLSI & system-on-chip design and test, design for testability, aging of MOS transistors, design for reliability, fault diagnostic and prognostic methodologies for mission-critical applications, application specific processor architectures.